Architectural Design

Before a project begins in earnest, advice and direction will be provided to remove potential barriers to achieving a successful architectural design. “What -if” analysis for backplane interfaces, inter-chassis communication channels, memory interfaces, multi-drop busses (and other interfaces that may be pushing the edge of technology) can be simulated prior to committing to a particular system architecture. This type of analysis is valuable because it will let the designers know what is possible before committing a certain technology to the architecture. Without this analysis, companies face disastrous ramifications when it is found, late in the design cycle, that a particular technology has a flaw. Some additional examples of up-front, “what-if” analysis are:

• High-speed connector evaluation/research for designs (backplane, card-to-card, etc.) in order to meet system level performance goals for the first generation and beyond.
  
  
• Ansoft (Ansys) HFSS - 3D field solving of vias in the most accurate manner possible. Also used for antenna, microwave filter, connector, etc. design.
  
  
• ASIC I/O simulation. All I/O specific attributes such as I/O type, drive strength, slew rate, etc. can be analyzed before a costly spin of an ASIC is committed to fabrication.
  
  
• Power subsystem architecture.
  
  
• System clocking architecture.
  
  
• Hot swap architecture.
  
  

Some of the questions that can be answered during the Architectural Design Phase:

• Will Vendor X’s backplane connector meet my system performance goals/requirements? Will my backplane work with the proposed silicon?
  
  
• How many memories can I place on my 600Mbit/s DDR bus?
  
  
• How do I handle the Power Subsystem and Hot-swap Architectures?
  
  
• Can Chip A work with Chip B and how far apart (or close) can they be placed?
  
  
• How do I handle the System Clocking Architecture?
  
  
• What I/O type/drive strength should I use for my ASIC/FPGA I/O?
  
  
• How will my backplane protocol handle bit errors across the interface?
  
  
• How do I handle all of the system grounds (digital, chassis, analog, PLL, etc.)?